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SGX: 256-color mode

 
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Charles MacDonald
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Joined: 07 Dec 2005
Posts: 35

PostPosted: Sun Jun 24, 2007 2:25 am    Post subject: SGX: 256-color mode Reply with quote

While it isn't known if the SGX has the 256-color mode the PC-FX has, there's a simple hardware hack you can do to re-create it. Wink

Both VDC #1 and VDC #2 have a 9-bit bus, which are fed into the VPC. Each bus has 1 bit for a sprite/bg indicator, 4 bits for the palette, and 4 bits for the pixel data. The VPC internally combines the two based on layer enable and priority settings stored in the VPC registers, then outputs the merged 9-bit data directly to the VCE. This means both VDC graphics layers share the VCE palettes.

By using the pixel output from one VDC to supply the palette input of the other VDC, we can select the pixel and palette value uniquely for every pixel on the screen, allowing 1 of 256 colors to be displayed at any point. It's actually 240 colors since color 0 of each palette is transparent, according to how the VPC processes pixel transparency (by only observing the pixel bits and ignoring the palette bits). Since both VDCs are used to generate one display, you are down to one background layer and one sprite layer again.

In effect, VDC #1 graphics store the low 4 bits of an 8-bit image, VDC #2 graphics store the upper 4 bits. For compatibility with original PCE/SGX software, I'd suggest an addition too; use a 74LS157 multiplexer with these connections:

A inputs = VDC #1 VD4-VD7
B inputs = VDC #2 VD0-VD3
Y outputs = VPC input bus for VDC #1 VD4-VD7
A/B = A spare output port from the HuC6280 like any of O2 through O7 for *software* control of the 256 color mode.

Sounds all fine in theory, so I actually implemented this and wrote a test program to demonstrate it. I took a slightly different route with my SGX just because this was easier to do:

- Cut the traces between VDC #2 VD4-VD7 (IC108 pins 34,31,30,29) and the VPC. The traces make an L-bend to the right of the chip where it's easy to cut. Be careful!

- Solder wire links from VDC #1 VD0-VD3 on the backplane (pins a20,a19,a18,a17 on row A) to VPC pins 50,51,52,53 (VDC #2 VD4-VD7 inputs).

Here's the test program which expects the above modification to be done, it displays a picture from Resident Evil 4:

http://cgfm2.emuviews.com/tmp/pce256.zip

In general, this is how you program the 256-color mode (for the suggested connections, not how I modded my SGX):

- Both VDCs need to have identical BATs, SATs, and VDC register settings. The only difference is storing tile data with the eight bitplanes split up so the first four go to one VDC and the other four go to the other VDC.

- Set up the VPC so that only VDC #1 is enabled. Keep VDC #2 disabled in the $0008/$0009 enable regs.

- The palette field in the SAT or BAT now has no effect. Maybe for the BAT they could still be used as per-tile "soft" attribute flags.

It's a little ironic that the SGX in fact has a multiplexer that is mostly unused to control the extra I/O port. Why NEC didn't modify the VPC for this functionality or add extra hardware to enable it is a mystery. Sure it takes more processing power to move double the VRAM around, but it's still quite useful.
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